1. Field of the Invention
This invention relates to a semiconductor substrate, such as a silicon carbide substrate made by forming an epitaxial layer on a semiconductor layer, having had its warp straightened; a method for straightening warp of a semiconductor substrate; and a method for manufacturing a silicon carbide semiconductor device using a silicon carbide substrate having had its warp straightened.
2. Related Art
The use of a silicon carbide (hereinafter abbreviated to SiC) semiconductor device as a trench gate type SiC power MOSFET is disclosed in Japanese Patent Application Laid-open No. H.7-326755 and Japanese Patent Application Laid-open No. H.8-70124. This SiC power MOSFET has excellent characteristics such as low on-resistance and high withstand voltage. Its sectional construction is shown in FIG. 13.
A SiC substrate 100 is made by successively forming an n.sup.- -type epitaxial layer (high-resistance layer) 2 and a p-type epitaxial layer 3 on a hexagonal system n.sup.+ -type monocrystalline SiC semiconductor substrate (low-resistance semiconductor layer) 1 whose surface plane orientation is (0001) carbon face.
An n.sup.+ source region 5 constituting a semiconductor region is formed in the p-type epitaxial layer 3. Also, a trench 6 passing through the n.sup.+ source region 5 and the p-type epitaxial layer 3 and reaching the n.sup.- -type epitaxial layer 2 is formed. Inside the trench 6 a gate thermal oxide film 7 is formed and on that a gate electrode layer 8 (8a, 8b) is formed. Also, a source electrode layer 10 constituting a first electrode layer is formed on an interlayer insulating film 9, the surface of the n.sup.+ source region 5 and the surface of the p-type epitaxial layer 3, and a drain electrode layer 11 constituting a second electrode layer is formed on the back surface of the semiconductor substrate 1.
In the construction described above, the surface of the p-type epitaxial layer 3 on the side surface 6a of the trench 6 is a channel region. When a positive voltage is impressed on the gate electrode 8 and a channel is formed, a current flows between the source and the drain.
However, when a thin film of epitaxial layer (epitaxial growth film) is deposited on the semiconductor substrate, internal stress arising at the time of formation of the epitaxial layer causes the substrate to warp. Due to this kind of warp, deviation occurs in mask alignment of when manufacturing a semiconductor device. In particular, the problem of warp becomes more serious as the size of the semiconductor substrate becomes large. According to experiments carried out by the present inventors, the problem of mask misalignment caused by warp of the SiC substrate 100 becomes serious when the diameter of the SiC substrate 100 is one inch or more.